From 62e07052bd072135e9cdc6b6b8ec9ee1615653d6 Mon Sep 17 00:00:00 2001
From: Roger Hardiman <software@rjh.org.uk>
Date: Tue, 16 Apr 2024 12:09:46 +0000
Subject: [PATCH] Handle RISC-V CPU Manufacturer and Brand using uarch in
 /proc/cpuinfo

In the RISC-V world, CPUs are often designed by companies like SiFive, T-Head and Andes.
Use the /proc/cpuinfo 'uarch' values to get the CPU designer and CPU model.

These designs are then licensed to SoC manufacturers who add I/O and GPU features.
For example Allwinner (D1) and StarFive (JH7110), and Sophgo (SG2000)
---
 lib/cpu.js | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/lib/cpu.js b/lib/cpu.js
index dfe25d5..786a584 100644
--- a/lib/cpu.js
+++ b/lib/cpu.js
@@ -605,6 +605,9 @@ function cpuManufacturer(str) {
   if (str.indexOf('Xen') >= 0) { result = 'Xen Hypervisor'; }
   if (str.indexOf('tcg') >= 0) { result = 'QEMU'; }
   if (str.indexOf('apple') >= 0) { result = 'Apple'; }
+  if (str.indexOf('sifive') >= 0) { result = 'SiFive'; }
+  if (str.indexOf('thead') >= 0) { result = 'T-Head'; }
+  if (str.indexOf('andestech') >= 0) { result = 'Andes Technology'; }
 
   return result;
 }
@@ -788,6 +791,17 @@ function getCpu() {
               }
             }
 
+            // Test RISC-V
+            if (util.getValue(lines, 'architecture') === 'riscv64') {
+              const linesRiscV = fs.readFileSync('/proc/cpuinfo').toString().split('\n');
+              const uarch = util.getValue(linesRiscV, 'uarch') || '';
+              if (uarch.indexOf(',') > -1) {
+                const split = uarch.split(',');
+                result.manufacturer = cpuManufacturer(split[0]);
+                result.brand = split[1];
+              }
+            }
+
             // socket type
             let lines2 = [];
             exec('export LC_ALL=C; dmidecode –t 4 2>/dev/null | grep "Upgrade: Socket"; unset LC_ALL', function (error2, stdout2) {